ISMVL 2002 PRELIMINARY PROGRAM

THURSDAY, May 16

Invited Talk (Sergiu Rudeanu)

ALGEBRA I

• H. Machida, I. G. Rosenberg and M. Miyakawa: 
  Some Results on Centralizers of Monoids in Clone Theory
  
• B.A. Romov: 
  Partial Hyperclones on a Finite Set
  
• Michiro Kondo: 
  On structures of weak interlaced bilattices

LOGICAL DESIGN I

• Claudio Moraga: 
  Improving the characterization of p-valued threshold functions
  
• E. Dubrova: 
  A conjunctive decomposition of multiple-valued functions
  
• D. Popel, A. Dani, Sierpinski: 
  Gaskets for Logic Functions Representation
  
• Noboru Takagi and Kyoichi Nakashima: 
  Logic for Static Hazard Detection of Multiple-Valued Logic Circuits with Tsum, Min, and Literals

CIRCUITS I

• Yasushi Yuminaka, Tatsuya Morishita, Takafumi Aoki, and Tatsuo Higuchi: 
  Multiple-Valued Data Recovery Techniques for Band-Limited Channels in VLSI
  
• Takao Waho, Shin-ya Kobayashi, and Koji Matsuura: 
  An Impact of Introducing Multi-Level Signals to a Bandpass Cascaded Delta-Sigma Modulator
  
• Y.B.Guo, K.W. Current:
  Voltage Comparator Circuits for Multiple-Valued CMOS Logic
  

LOGICAL DESIGN II

• D.Jankovic, R.S.Stankovic, R. Drechsler 
  Efficient Calculation of Fixed-Polarity Polynomial Expressions for Multiple-Valued Logic Functions
  
• K. J. Adams, J. McGregor: 
  A Calculation Laboratory for Quaternary Reed-Muller Canonical Forms and Some New Statistical Results
  
• B.Polianskikh, Z. Zilic: 
  Design and Implementation of Error Detection and Correction Circuitry for Multilevel Memory Protection
  
• M. Natsui, T. Aoki, T. Higuchi: 
  Parallel Evolutionary Graph Synthesis on a PC Cluster and Its Application to Multi-Valued Circuit  Synthesis

FRIDAY, May 17

Invited Talk (D. Mundici)

SPECTRAL TECHNIQUES

• R.S. Stankovic, J. Astola: 
  Some remarks on linear transform of variables in representation of Adders by word-level expressions and spectral transforms decision diagrams.
  
• M.A. Thornton, D.M. Miller, W.J. Townsend: 
  Chrestenson Spectrum Computation Using Cayley Color Graphs
  
• Z.Zilic, K. Radecka:
  The Role of Super-Fast Orthogonal Transforms in Speeding up Quantum Computations
  
• Bogdan J. Falkowski and Beata T. Olejnicka: 
  Multiple-Valued and Spectral Approach to Lossless Compression of Binary, Gray Scale and Color Biomedical Images.
  

CIRCUITS II

• E. Zaitseva, V. Levashenko: 
  Design of dynamic deterministic reliability indices Contact author: Dr. E. Zaitseva
  
• Naotake Kamiura, Teijiro Isokawa, and Nobuyuki Matsui: 
  On Multiple-Valued PODEM Based on Static Testability Measures and Dynamic Testability Measures.
  
• Xunwei Wu, Penjun Wang, and Yinshui Xia: 
  Design of Ternary Schmitt Triggers Based on Its Sequential Characteristics
  
• Hiromitsu Kimura, Takahiro Hanyu, and Michitaka Kameyama:
  Multiple-Valued Logic-in-Memory VLSI Based on Ferroelectric Capacitor Storage and Charge Addition
  

Invited Talk (R. Brayton)

ALGEBRA II

• Hiroaki Kikuchi and Noboru Takagi: 
  de Morgan Bisemilattice of Fuzzy Truth Value
  
• Tomoko Ninomiya, Masao Mukaidono: 
  Independence of Each Axiom in a Set of Axioms and Complete Sets of Axioms for Boolean Algebras
  
• I.Rosenberg, D.A.Simovici, S.Jaroszewicz: 
  On Functions Defined on Free Boolean Algebras
  

LOGICAL DESIGN III

• S. Yanushkevich, P.Dziurzanski, V.Shmerko: 
  The Word-Level Models for Efficient Neural-Like Computation of Multiple-Valued Functions. PART 1: LAR Based Model
• Tomaszewska, S. Yanushkevich, V. Shmerko: 
  The Word-Level Models for Efficient Neural-Like Computation of Multiple-Valued Functions. PART 2: LWL Based Model
• Ilia Polian, Piet Engelke, Bernd Becker: 
  Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics

SATURDAY, May 18

Invited Talk (Takagi)

DECISION DIAGRAMS

• M. Miyakawa, N. Otsu, I. Rosenbereg:  
  Variable Selection Heuristics and Optimum Decision Trees - An Experimental Study
• D. M. Miller, R. Drechsler: 
  On the Construction of Multiple-Valued Decision Diagrams
• R. Drechsler:
  Evaluation of Static Variable Ordering Heuristics for MDD Construction
• Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi and Munehiro Matsuura: 
  Representations of Logic Functions using QRMDDs
  

CIRCUITS III

• Tsukasa Ike, Takahiro Hanyu, and Michitaka Kameyama: 
  Fully Source-Coupled Logic Based Multiple-Valued VLSI
  
• Sung Il Han, Seung Yong Park, Hyeon Kyeong Seong, and Heung Soo Kim: 
  A Current-Mode Folding/Interpolating CMOS Analog to Quaternary Converter Using Binary to Quaternary Encoding Block
  
• Motoi Inaba, Koichi Tanno, and Okihiko Ishizuka: 
  Multi-Valued Flip-Flop with Neuron-CMOS NMIN Circuits

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Last updated on 02/28/2002