Welcome to CHiLL@UMB! We work on developing cutting-edge data management solutions involving state-of-the art storage and memory devices along with contemporary storage engine. We are currently working on optimizing LSM compactions via Machine Learning, ZNS SSD operations, database bufferpool and developing CXL-optimized disaggregated database systems. In addition, we developed a new design paradigm for interacting with durable storage that takes into account performance asymmetry between read and write operations, as well as the variable access concurrency that SSDs may support. Toward this, we proposed the Parametric I/O Model that captures these key modern storage properties. Following the model, we developed an asymmetry/concurrency-aware bufferpool manager and a concurrency-aware graph manager. We further developed a reinforcement learning based multi-tiered storage systems that considers both workload and device properties. In addition, we are working on hardware/software co-design approaches using reprogrammable technology to support on-the-fly near-data transformation that supports efficient hybrid transactional/analytical processing (HTAP).

We propose to tune LSM parameters via reinforcement learning based on workload properties.
We introduce an experimental platform named UNIZNS that integrates several existing and new file placement, garbage collection, and zone allocation policies to identify which combinations work best under different compaction policies and workloads.
We propose a reinforcement learning-based page migration policy for a multi-tiered storage architecture that considers both workload and device (SSD) properties.
We develop a concurrency-aware graph manager CAVE that exploits full SSD parallelism and implement five popular graph traversal algorithms.
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We propose an SSD-aware bufferpool manager ACE, that writes multiple dirty pages concurrently to amortize the asymmetric write cost.
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We introduce a new type of near-memory computation to transform between row-wise data to column-wise data on the fly via an FPGA-based custom hardware. This reduces cache pollution while ensuring optimal data layout for any query.
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We propose a simple yet expressive I/O model that considers asymmetry and concurrency of contemporary storage devices.
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Lethe provides persistence guarantees for delete operations within bounded time and enables efficient secondary range deletes in LSM-based storage engines.
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